1. Field of the Invention
The present invention relates to an additional processing unit (which will be called a "slave processor" hereinafter) coupled to a microprocessor and, more particularly, to a register saving/restoring system for saving and restoring data in a register provided in the slave processor into and out of a main memory unit when tasks are switched.
2. Description of the Prior Art
The microprocessor is frequently composed of a plurality of chips when attempts are made to extend its function, because all the functions cannot be integrated into a single chip.
Since each chip has its pin number limited, a microprocessor system is currently constructed by coupling a chip for a central processing system (which will be abbreviated into "CPU") and one or more chips for slave processors through a local bus.
The CPU itself has a function of the microprocessor. But, the function can be easily extended and the operation can be executed at a high speed by coupling the CPU with one or more slave processors and causing these processors to execute the extended commands of the CPU.
One microprocessor according to the prior art is shown in FIG. 1. A CPU 109, eight slave processors 101 to 108 and a main memory unit 140 are coupled through a local bus 130 to construct altogether a microprocessor 100. The CPU 109 contains at least one register 119, and each of the slave processors 101 to 108 contains at least one register 111 to 118.
Commands for the microprocessor 100 are classified into nine sets: one set to be executed by the CPU 109 and eight sets to be executed by the slave processors 101 to 108. The set of commands to be executed by the CPU 109 uses the register 119 in the CPU 109 but not the registers 111 to 118 in the slave processors 101 to 108. On the contrary, the set of commands to be executed by the slave processor 101 uses both the register 111 in the slave processor 101 and the register 119 in the CPU 109 but not the registers 112 to 118 in the remaining slave processors 102 to 108. This usage also applies to the slave processors 102 to 108.
In case there are several tasks to be executed by the CPU, generally speaking, they are executed in independent environments. Therefore, when the tasks themselves are to be switched, it is necessary to switch the environments of the tasks. The major task environments are registers belonging to a microprocessor. In the microprocessor 100 of the prior art shown in FIG. 1, the registers 119 and 111 to 118 can create the task environments. The switching of these task environments is conducted by saving the content of a register or the environment of a previous task in a register save area which is prepared for each task on the main memory unit 140 and by restoring the once saved register content into the registers 119 and 111 to 118 out of the register save area of the next task to be switched.
FIG. 2 shows the case in which tasks A, B and C are to be asynchronously switched. All the programs of the tasks A, B and C contain the commands to the CPU 109 and the slave processors 111 to 118. At the instants of task switchings 201, 202 and 203, therefore, the register saving/restoring processes are conducted for the registers 111 to 118.
The microprocessor of the prior art described above and constructed of the CPU and one or more slave processors is accompanied by the following defect: Although the programs of individual tasks contain commands to the slave processors, even the registers of the slave processors unused in the task switching are subjected to the saving/restoring processes, too, in case the slave processors are not used in a segment continuing from a current task switching to a subsequent task switching. This defect becomes more serious for a greater number of slave processors coupled to the CPU and each containing a register therein, so that the time period needed for the task switching becomes the longer.
In the example of FIG. 2, a waste register saving/restoring processing is presented in the following:
(1) Since nothing but the slave processor 101 is used in a segment 212, the register saving/restoring process may be required for the slave processor 101 only. At the task switching 201, however, the registers of the slave processors 102 to 108 are also saved and restored.
(2) In a segment 213, none of the slave processors 101 to 108 are used. At the task switchings 202 and 203, the registers of the slave processors 101 to 108 are also saved and restored.
(3) Although the slave processor 102 is left unused in the segments 212 and 213, its register is also unnecessarily saved and restored at the task switchings 201, 202 and 203.
The register saving/restoring processings thus conducted unnecessarily are caused by the fact that they are conducted at any task switching for all the slave processors that may possibly be used for a subsequent task.